1. Technical Field
The present invention relates to semiconductor device and fabrication and more particularly to devices configured to reduce susceptibility to soft error effects.
2. Description of the Related Art
Soft-errors are errors in data or state that occur not due to hard failures of a device, but due to other circumstances. For example, soft-errors may occur due to charge leakage, radiation, decay, etc. and not assumed to imply a mistake or breakage of the device. After observing a soft error, there is no implication that a device is any less reliable than before.
If detected, a soft error may be corrected by rewriting correct data in place of erroneous data. Soft errors involve changes to data, e.g., in the electrons in a storage circuit, but not changes to a physical circuit. If the data is rewritten, the circuit will work perfectly again. Compared to bulk complementary metal oxide semiconductors (CMOS), silicon on insulator (SOI) CMOS is less prone to soft-error effects. However, the soft-error effects in SOI CMOS devices are still appreciable.
In the operation of a SOI field effect transistor (FET), there is a parasitic bipolar transistor formed with the source region acting as the emitter, the body region acting as the base, and the drain region acting as the collector. Whenever the emitter-base diode is forward biased, charge is injected from the emitter into the base region and collected by the collector, and charge is injected from the base region into the emitter. The charge collected at the collector gives rise to a collector current, and the charge injected from the base into the emitter gives rise to a base current. The current gain of the parasitic bipolar transistor is the ratio of the collector current to the base current.